So, I have finally gotten around to writing something again!

I have recently been working on a board that is using an FTDI FT2232H as the interface between an FPGA and USB interface. The requirement is simple, get data from FPGA to USB as fast as possible.

I have encountered some problems getting the FTDI chip to work properly in this mode.  Whilst the datasheet is reasonably good, and the application note on exactly this mode is concise (but logically correct) I kept on running into problems with the TXE# pin not going low, to permit data to be written to the internal FIFO.  All my software tweaks yielded nothing – the head banging was strong!  I put pen to paper and started writing my support email to the people at FTDI, working my way through the data sheet to explain what I had done.  All of the control lines were pulled in the correct directions. And then I found it, that crucial text: “Tie this pin to VCCIO if not used.

It turns out that that instruction is important when applied to the SIWU pin. Take heed.  As soon as the HDL code was modified to pull this line up – presto! It works!